Recently, semiconductor devices using Si crystals have attained improved multifunctionality and high-speed capability in turns. This attainment is largely attributable to scaling-down of transistors and other semiconductor elements. To continue to improve semiconductor-device performance in the future, further scaling-down of semiconductor elements is necessary. In order to pursue further performance-improvements, however, there exist many problems to be technically overcome other than semiconductor device scaling-down.
For example, even if the semiconductor elements have been further downsized, the optimal performance of the resultant semiconductor devices is restricted by the physical properties (e.g., mobility) of the base material, i.e., Si. In other words, as long as a Si crystal is employed as the material, dramatical improvement in device performance will be problematic.
Therefore, semiconductor devices using mixed-crystal semiconductors of Group IV elements have attracted attention these days as semiconductor devices operatable at high speeds. In particular, carbon C-containing crystals of Si1-x-yGexCy (where 0<x<1 and 0<y<1), which are Group IV elements (hereinafter also referred to as SiGeC) have been intensely researched recently. The Si1-x-yGexCy crystals may be regarded as an improvement on Si1-xGex crystals (where 0<x<1) which recently have been made practicable as a semiconductor device material (hereinafter also referred to as SiGe). The Si1-x-yGexCy crystals are understood to have the following superior properties.
A Si1-xGex crystal that has been put into practical use is a material having a lattice constant larger than that of Si crystal. Accordingly, if a heterojunction is formed by superposing a Si1-xGex crystal layer on a Si layer, a great compressive strain is created in the Si1-xGex crystal layer. When the thickness of the Si1-xGex crystal layer exceeds the thickness limit, which is called the critical thickness (i.e., the upper-limit thickness where the film can be deposited without dislocation), this compressive strain gives rise to a phenomenon in which even while dislocation is generated in the Si1-xGex crystal layer, and thus stress therein is relaxed. Moreover, near the critical thickness, even though the film thickness does not exceed the critical thickness, relaxation of stress attendant on dislocation can occur when the film is subjected to heating. Turning also to the band structure at the heterojunction where the Si and Si1-xGex crystal layers are stacked: a band offset (a heterobarrier) is formed only in the valence band edge of the Si1-xGex crystal layer. This means that in fabricating high-speed MIS transistors with Si1-xGex crystal layers for the channels, only p-channel MIS transistors can be manufactured.
However, if C is added to the Si1-xGex crystal, because C is an element having an atomic radius smaller than that of Si or Ge, the lattice constant of this crystal decreases, thus reducing strain. The lattice structure of Si1-x-yGexCy in which C is added in an amount of about one-eighth of the Ge mole fraction almost lattice matches with that of the Si crystal. In addition, since strain accumulated in the Si1-xGex crystal can be reduced, thermal stability is also enhanced. It has been reported (in K. Brunner et al., J. Vac. Sci. Technol. B16, 1701 (1998)) that in a heterojunction structure in which Si1-x-yGexCy and Si crystal layers are stacked with composition in which the mole fractions of Ge and C are high (the Ge mole fraction is several tens atomic percent and the C mole fraction is above several tens atomic percent), band offset is formed in each of the valence and conduction band edges of the Si1-x-yGexCy crystal. In this case, carriers are confined within either the valence and conduction band edges, thus enabling manufacturing of not only p-channel transistors but also n-channel transistors. In addition, C is known to have a diffusion-suppressing effect on boron (B). This property of C operates very effective in fabricating semiconductor devices that require appropriate control over boron profile and is also useful in stabilizing the semiconductor-device manufacturing. For example, the use of a semiconductor layer containing C in a region to be doped with boron in fabricating an ultrahigh-speed npn bipolar transistor with a narrow (i.e., thin-layer) base region or for fabricating a field-effect transistor with a δ-doped layer prevents the heating treatment from causing the boron to diffuse, thereby ensuring fabrication of a device that has a doping profile as designed.